Job Information
Amazon Sr. RTL Design Engineer, Hardware Compute Group in Sunnyvale, California
Description
Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create?
The Role:
As a Senior RTL Design Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the micro-architecture and implementing the corresponding RTL for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in an FPGA or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will:
Design world class hardware and software
Communicate and work with team members across multiple disciplines
Develop detailed design specifications and documentation
Perform RTL coding and synthesis
Work with Partners/Supplier to optimize and customize their products
Run industry standard code quality tools and fix issues found by them
Participate in test plan and coverage reviews
The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages. They should have developed complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI, APB, AHB, and implementations. Experience with I/O interfaces such as SPI, I2C, I2S, PDM, and MIPI CSI/DSI/Slimbus/Soundwire is
preferred. Experience with memory instantiation and memory compilers is also preferred. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues.
If you have the required skills and experience, we encourage you to apply for this exciting opportunity to join our growing hardware design team.
Basic Qualifications
Master's degree in Electrical/Computer Engineering or related field
5+ years of RTL development experience with a record of taping out production silicon
Experience with design development using Verilog/SystemVerilog
Experience in defining micro-architecture from architecture guideline and model analysis.
Experience in performance/power/area analysis and trade-offs
Proficient in design methodologies and EDA tools
Experience working with Synthesis, timing closure, and design constraints
Excellent problem-solving and debugging skills
Ability to work collaboratively in a team environment and communicate technical ideas effectively
Preferred Qualifications
PhD in Computer Science, Electrical Engineering, or related field
Experience with design of video/graphics pipeline and image processing algorithms
Familiarity with display panel and display driver IC technologies
Experience with ARM and various DSP ISA
Experience debugging system-level issues
Experience in entire design flow from architecture to final silicon.
Good programming skills in C/C++ and scripting skills in Python, Tcl, and/or Perl
10 years or more of practical experience
Experience with wide variety of low power design techniques
Working experience with high performance industry standard buses like AMBA AXI4
Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains
Large breadth of knowledge from architecture through physical design
Knowledge of FPGA and emulation platforms
Knowledge of SoC architecture
Excellent verbal and written communication skills
Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status. For individuals with disabilities who would like to request an accommodation, please visit https://www.amazon.jobs/en/disability/us.
Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site.
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