Intel Logic Design Engineer in Santa Clara, California
The world is transforming – and so is Intel! Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!
The IPG (IP Engineering Group) is looking for energetic and passionate RTL Design Engineers to develop high speed IP and Sub System Designs (like PCIe, UPI, CXL, IOMMU controllers etc).
Your responsibilities will include but not limited to:
Participate in uarchicture definition.
Develop IP RTL Code.
Develop IP Design constraints (SDC).
Perform the IP qualification using FE tools like Lint, CDC, Synthesis, STA, Power Analysis etc.
Help Define white box cover points/assertions for IP/Sub System.
Debug functional failures.
Support IP integration/debugs in end application (SoC) env.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience in:
Front End RTL Design tools like Lint, CDC, Synthesis, STA, XML etc.
High speed serial links IPs (PCIe, UPI, CXL, IOMMU etc).
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
US, Arizona, Phoenix;US, California, Folsom;US, Colorado, Fort Collins;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Annual Salary Range for jobs which could be performed in US, Colorado:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here (https://www.intel.com/content/www/us/en/jobs/benefits.html)
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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