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Intel Custom EM/IR Design Automation Engineer in Phoenix, Arizona

Job Description

As a Custom EM/IR Design Automation Engineer, you'll be responsible for but not limited to the following:

  • Develop and enhance scripts and utilities for Custom EM/IR tool automation and QA of design kit releases

  • Work with industry CAD vendors to enable required features to support EM/IR analysis on Intel process technologies.

  • Set up, run, and evaluate results from Custom EM/IR tool and flow QA testing.

  • Debug customer reported issues with Custom EM/IR tools and flows.

About the team

This position is within the Design Enablement (DE) organization of Technology Development (TD). At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies. As part of the DE Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems, enabling PDKs for Intel's most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors and product design teams to develop and deliver high quality technology collaterals, models and enablement of EDA tools.


You must possess minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Master's in Electrical Engineering or Computer Engineering

6+ months experience with:

  • Programming or scripting in C/C++ OR Python OR Perl OR Tcl OR Unix shell

  • Custom OR analog IC design and layout

  • CMOS silicon process technology

Preferred Qualifications:

  • Working knowledge of Cadence Voltus-Fi, Synopsys CSRA, ANSYS Totem, or ANSYS Pathfinder

  • Familiarity with semiconductor reliability physics and failure mechanisms, including electro-migration, latch-up, and electrostatic discharge (ESD).

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, California, Folsom;US, California, Santa Clara

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.