Intel SoC Debug Engineer in Hudson, Massachusetts
The SOC Debug Engineer role has a single purpose which is to solve our most challenging product issues. SOC Debug Engineers work with our internal product teams (Manufacturing/Validation/Software) and our customer teams during critical escalations to rootcause systemlevel failures and/or anomalies directly impacting our customers or jeopardizing our committed timelines. They are responsible for performing lowlevel and complex debug across multiple IP and system domains within a product, and will use their experience with/understanding of SOC design and architecture, Firmware, Bios and software to completely understand any issue and drive a resolution. They are also expected to drive innovative debug capability improvements through new Design for Debug (DFD), debug tools and scripts to continuously improve the debug discipline
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications: � Bachelor's degree in Electrical/Computer Engineering or Computer Science with 5+ years of experience or a Master's degree in Electrical/Computer Engineering or Computer Science with 3+ years of experience in the field of hardware design/validation. �Expertise in CPU IP/SoC architecture/microarchitecture design/validation experience �Hands-on experience in debugging complex post silicon failures and driving them to root-cause �Good working knowledge of On-chip tracing/triggering, ability to debug with oscilloscopes and logic/protocol analyzers �Excellent problem solving/brain-storming skills and excellent written and oral communications and experience working in cross-functional and cross-site teams �Ability to find Firmware/BIOS work-arounds to avoid silicon fixes �Good software/programming skills (especially with Python) �Excellent written and oral communication skills and experience working in cross-functional and cross-site teams Preferred Qualifications: �Ability to work in effectively across pre-si design/validation and post-si validation �Overall knowledge of SoC Architecture, Intel x86 Architecture, memory subsystem and cache coherence
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Inside this Business Group
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
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