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Job Title: ASIC/FPGA Design: Associate Member of Engineering Staff (AMES)

Job Code: 22249

Job Location: Camden, NJ

Schedule: 9/80 reg withg every other Friday off

Job Description:

Reporting to the Manager, Engineering (ASIC/FPGA), the Associate Member of Engineering Staff (AMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will be part of design/verification team to implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP, PCIe, USB protocols.

L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS).

This role presents a great growth opportunity for a budding engineer, developing and delivering communication products for National Security. Upon joining the team, a mentor will be assigned to support assimilation and provide technical mentorship and guidance

Essential Functions:

• Responsible for deriving engineering specifications from system requirements and developing detailed architecture

• Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)

• Generate test plans

• Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards

• Silicon/FPGA bring up, characterization and production ramp/support/collateral

  Qualifications:

• BSEE, MSEE Preferred.

• 0-2 years Experience

• Prior engineering internship/co-op experience, preferably in the Defense & Aerospace market

• Exposure to VHDL, Vivado, Xilinx FPGAs

• Strong logic/board debug, and analytical skills.

• Excellent written, verbal, and presentation skills.

• Active SECRET Clearance

  Preferred Additional Skills:

• A big plus if the candidate possesses “any” of the following:

• Proficiency in C++ (OOP)

• Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS.

• Digital Signal Processing (DSP) background.

• Knowledge of protocols – TCP/IP, Ethernet, PCIe, NVMe, USB protocols.

• Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto).

L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.

Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.

By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.

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